Electronics Laboratory Sequence — Devices, Amplifiers, and Logic

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Laboratory & Measurement

Role
Lab partner pairs; individually attributed sections
Period
B EE 200, 331, 332 — 2025 to spring 2026
  • circuit analysis
  • node-voltage method
  • LTspice simulation
  • PSpice device models
  • MOSFET characterization
  • BJT characterization
  • diode and Zener circuits
  • amplifier design to specification
  • current mirrors
  • differential amplifiers
  • CMOS logic
  • oscilloscope and multimeter measurement
  • simulation versus measurement comparison

Situation

Three electrical engineering laboratory courses taken across 2025 and 2026, progressing from circuit analysis through device characterization to amplifier and logic design. Work was done in partner pairs, with each report's sections individually attributed by name.

Every lab follows the same discipline: calculate the expected result, simulate it, build it, measure it, and compare all three. That loop is the reason this sequence belongs in an engineering portfolio rather than a transcript.

Actions

  • Circuit analysis (B EE 200). Applied the node-voltage method to a multi-source bridge circuit, then verified the predicted node voltages against LTspice simulation and against measurements taken on the breadboard.
  • Diode circuits and limiters (B EE 331). Characterized voltage limiting and clipping circuits built from standard and Zener diodes across several configurations, driven by a function generator and observed on an oscilloscope.
  • Designed a voltage limiter to a specification. Given a square wave swinging from −3 V to +7 V, designed a circuit to clip it to −2.1 V and +5.4 V, stacking three 1N4148 diodes to set the negative limit and combining a reverse-biased 1N4732 Zener with a 1N4148 for the positive, then verified the design in LTspice against the measured output.
  • MOSFET characterization (B EE 331). Measured the 2N7000 NMOS device, deriving drain current from Ohm's law across a range of gate voltages to produce ID–VGS and ID–VD characteristic curves.
  • BJT characterization (B EE 331). Measured IV characteristics of the 2N3904 NPN transistor using separate base and collector supplies.
  • CMOS logic (B EE 331). Built a NAND gate from a CD4007 array, derived the expected truth table from the transistor-level schematic by reasoning about which PMOS and NMOS devices conduct in each input state, and confirmed the behaviour on the oscilloscope.
  • Transistor bias circuits (B EE 332). Designed, built, and tested MOSFET DC bias circuits, comparing calculated operating points against simulated and measured values.
  • Amplifier design to specification (B EE 332). Designed a common-source NMOS amplifier to hit a defined operating point of ID = 2 mA and a small-signal voltage gain of Av = −20 V/V, then built and measured it against the target.
  • Current sources and differential amplifiers (B EE 332). Analyzed, simulated, and constructed MOSFET current mirrors, verifying current-mirroring behaviour by measurement, and extended the work to differential amplifier stages.

Outcome

Nine laboratory reports covering circuit analysis, three device families, amplifier design against numerical specifications, and CMOS logic — each carrying schematics, simulation output, measured data, and a comparison between them.

This is the most direct evidence in the portfolio for the electrical half of the dual major, and the amplifier work is the strongest part: a design specified by numbers, built, and then measured against those numbers.

Lessons / safety

Three independent answers to every question. Calculation, simulation, and measurement each have distinct failure modes — an algebra slip, a wrong model or netlist, a miswired board or a loading error from the instrument itself. Running all three is what makes a disagreement informative instead of merely annoying.

These are course laboratories, run by every student in the section. As with the thermal fluids and materials laboratories, the sequence is recorded as a single entry rather than nine, and the value is in the method rather than in distinguishing one student from another.

Skills demonstrated

  • circuit analysis and the node-voltage method
  • LTspice and PSpice simulation, including supplied device models
  • MOSFET and BJT characterization from measured data
  • diode and Zener limiting circuit design
  • amplifier design to a numerical specification
  • current mirrors and differential amplifiers
  • CMOS logic at transistor level
  • oscilloscope, multimeter, and function generator measurement
  • comparison of calculated, simulated, and measured results

Evidence

Nine lab reports are held in this project folder, running to roughly 176 MB of schematics, oscilloscope captures, and measured data — not tracked in git per the evidence rule. Supporting SPICE model libraries, a diode I-V data spreadsheet, and further coursework are at C:\Users\Omar\Documents\UW\2026\EE, with earlier terms under C:\Users\Omar\Documents\UW\2025\EE and 2025\EE winter.